NASA's next lunar missions will not fail because a rover lacks cameras or a habitat lacks sensors. The harder question is whether the hardware can think fast enough, safely enough, and locally enough when Earth is too far away to steer every decision. That is why the agency's High Performance Spaceflight Computing processor, now deep in testing at the Jet Propulsion Laboratory, matters for cislunar space. NASA says the new radiation-hardened system-on-a-chip is designed to deliver more than 100 times the computing capability of current space processors. Early test indications are even sharper, with performance running at about 500 times the chips now in use. NASA's HPSC processor is being tested against radiation, thermal, shock, power, performance, and reliability requirements. Credit: AI-generated image. The Moon Has a Compute Problem Spacecraft computing has always been conservative for good reasons. Flight computers must survive radiation, temperature swings, vibration, shock, long mission durations, and years without repair. That reliability requirement leaves many missions flying processors that are trusted, but slow by terrestrial standards. For Apollo, that trade worked because the mission architecture was focused, ground support was constant, and onboard autonomy was limited. For Artemis and the larger cislunar economy, the job changes. Lunar surface systems will need to process images, classify hazards, manage power, route communications, handle science data, and keep crews or robots safe without asking Houston for every decision. The delay is not huge compared with Mars, but lunar operations still have hard real-time moments. A lander descending toward boulders, a rover approaching a shadowed crater rim, or a habitat managing an electrical fault cannot wait for a full human review cycle. Local computing becomes part of the safety system. Why this is news NASA says HPSC testing began at JPL in February and will continue for several months. The chip is working as designed so far, with early indications showing roughly 500 times the performance of current radiation-hardened chips in use. 100x+ NASA target versus current space processors 500x Early test indication cited by NASA 2040+ Mission needs the HPSC program is built to support What HPSC Actually Is HPSC stands for High Performance Spaceflight Computing. NASA describes it as a next-generation system-on-a-chip, a compact processor that integrates central processing, networking, memory, input and output interfaces, and specialized compute functions into one device. The design is being developed with Microchip Technology, based in Chandler, Arizona, through a public-private partnership led by NASA's Space Technology Mission Directorate, JPL, and the Game Changing Development program at Langley. The processor is meant to solve four linked problems: performance, power management, fault tolerance, and connectivity. That combination is important. A fast chip that drains a rover's battery is not useful on the Moon. A low-power chip that cannot process landing sensor data in time is not safe. A processor with impressive benchmarks but weak radiation handling will not last in deep space. AI-generated image HPSC is designed to connect sensors, instruments, networking, and flight control functions inside spacecraft avionics architectures. Capability Why it matters Cislunar use case Radiation hardening Reduces errors from high-energy particles and harsh space conditions. Long-duration lunar orbiters, landers, habitats, and relay satellites. AI and data processing Lets spacecraft process sensor data and images onboard. Hazard detection, science filtering, and rover route decisions. Power flexibility Allows unused functions to shut down or run in lower-power modes. Lunar night survival and power-constrained south pole operations. Advanced connectivity Links sensors and multiple processors through modern networking. Distributed spacecraft systems and modular surface infrastructure. NASA says the design uses an industry-standard, open-source instruction set architecture combined with fault tolerance, radiation tolerance, security features, and supporting software. That matters because future spacecraft will not be one-off boxes. They will look more like networks: cameras, lidars, power systems, communications terminals, robotics controllers, science instruments, and crew displays all moving data across the same mission. Why Autonomy Is Moving From Nice-to-Have to Required NASA's own HPSC project page is blunt about the requirement gap. Future missions need advanced autonomy, artificial intelligence and machine learning, image and signal processing, data flow management, object detection, and classification. Legacy processors cannot carry that full load across the missions NASA expects through 2040 and beyond. A lunar rover is a good example. The rover may need to identify hazards, choose between routes, preserve battery power, manage thermal limits, and decide which observations are worth sending back through a constrained communications link. If that rover is scouting terrain near permanently shadowed regions, the cost of slow computing rises. Shadows distort imagery. Slopes can be dangerous. The science target may be time-sensitive because lighting changes fast near the poles. AI-generated image Rovers operating near the lunar south pole will need onboard autonomy for hazard detection, route planning, science triage, and power management. Landing is even less forgiving. Jim Butler, HPSC project manager at JPL, said the team is using high-fidelity landing scenarios from real NASA missions to simulate workloads that would typically require power-intensive hardware. That detail is important. The chip is not only being tested against abstract benchmarks. NASA is asking whether it can support the kind of sensor-heavy landing data that future missions will need when they descend into rough terrain. What stronger onboard computing can change • Landing safety: Faster hazard detection and terrain-relative navigation during descent. • Rover productivity: More autonomous driving, fewer idle periods, and better science selection. • Data use: Onboard filtering so only the most valuable images and measurements are sent home. • Habitat resilience: Local fault response for power, life support support systems, and communications. The Radiation Trade Is the Real Test Consumer electronics move quickly because the environment is friendly and replacement is easy. Space hardware moves slowly because the environment is hostile and replacement may be impossible. High-energy particles from the Sun and deep space can flip bits, damage electronics, and push spacecraft into safe mode. Temperature swings and mechanical loads add more stress. NASA says JPL is testing the HPSC chips through radiation, thermal, shock, performance, and functional campaigns. That is the part that should matter most to mission planners. A lunar surface system needs compute performance, but it also needs the chip to keep producing reliable answers after years of exposure. The early numbers are promising, not final. NASA says testing will continue for several months. Certification for spaceflight will decide whether HPSC becomes a routine building block across orbiters, rovers, crewed habitats, and deep-space missions. Until then, this is a technical milestone with a remaining qualification campaign. What is proven now The chip is functioning in test, and NASA reports performance far above current radiation-hardened processors. What is still pending Space qualification requires continued radiation, reliability, power, thermal, shock, and functional validation. Who is building it Microchip Technology is developing the processor with NASA and JPL, with early samples going to defense and commercial aerospace partners. Where it could fly NASA lists Earth orbiters, rovers, crewed habitats, lunar missions, planetary missions, and deep-space spacecraft as futu